By Ricardo Lourenço, Nuno Lourenço, Nuno Horta
This paintings addresses the study and improvement of an leading edge optimization kernel utilized to analog built-in circuit (IC) layout. rather, this works describes the ameliorations contained in the AIDA Framework, an digital layout automation framework totally constructed via on the built-in Circuits Group-LX of the Instituto de Telecomunicações, Lisbon. It focusses on AIDA-CMK, by way of improving AIDA-C, that is the circuit optimizer component to AIDA, with a brand new multi-objective multi-constraint optimization module that constructs a base for a number of set of rules implementations. The proposed resolution implements 3 techniques to multi-objective multi-constraint optimization, specifically, an evolutionary method with NSGAII, a swarm intelligence process with MOPSO and stochastic hill mountaineering procedure with MOSA. furthermore, the carried out constitution permits the simple hybridization among kernels reworking the former basic NSGAII optimization module right into a extra developed and flexible module helping a number of unmarried and multi-kernel algorithms. the 3 multi-objective optimization methods have been confirmed with CEC2009 benchmarks to limited multi-objective optimization and validated with genuine analog IC layout difficulties. The accomplished effects have been in comparison by way of functionality, utilizing statistical effects acquired from a number of self sufficient runs. ultimately, a few hybrid techniques have been additionally experimented, giving a foretaste to quite a lot of possibilities to discover in destiny work.
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Extra info for AIDA-CMK: Multi-Algorithm Optimization Kernel Applied to Analog IC Sizing
This output reporting module is very important to maintain the model view controller pattern used by AIDA. The monitor is instantiated by two components as illustrated in Fig. 7, the ResultsPanel and MultiObjectiveReporter, both used in AIDA application to show the simulation results (A) and graphics (C), respectively illustrated in Fig. 8. Additionally, several controllers where implemented to conﬁgure the kernels. Those controllers are used in the dialog that set the algorithm parameters, as shown in Fig.
In the scope of this work and because the circuit is mapped as a constrained multi-objective problem usually with two objectives, the two objective constrained problems, CF1–CF7, were selected, and the corresponding Pareto fronts are illustrated in Fig. 1. 2 Evaluation of the Single-Kernel Methods To verify the behavior of the implemented algorithms and tune the algorithm parameters, several executions were conducted for the problems deﬁned previously. For the initial executions the number of evaluations was selected to be around 300,000 (as in the CEC2009 competition described in ) and n, the number of variables, is set to 4 for all the problems.
6 illustrates the four ranking fronts and the crowding distance of the solution B in a problem with two objectives. The crowding distance of the elements in a front is computed by iterating in the M objective functions, sorting the elements using each objective and for each element accumulating the Fig. 3 Non-dominated Sorting Genetic Algorithm II (NSGA-II) 25 normalized value of the distance between the elements before and after in the ordered set. The boundary elements (element with smaller and higher value of each objective) are assigned with inﬁnite value of crowding distance.
AIDA-CMK: Multi-Algorithm Optimization Kernel Applied to Analog IC Sizing by Ricardo Lourenço, Nuno Lourenço, Nuno Horta